A reduced complexity digital Multi--stAge noise SHaping (MASH) delta--sigma modulator (DSM) for fractional--N frequency synthesizer applications is proposed. A long word is used for the first modulator in a MASH structure; the sequence length is maximized by setting the LSB of the input to ``1''; shorter words are used in subsequent stages. Complete Design Methodology has been derived based on the error masking strategy to determine the optimized wordlength for each stage of the DDSM. Experimental results confirm simulations

Reduced Complexity MASH DDSM

References:

1. Z. Ye and M.P. Kennedy. Reduced Complexity MASH Delta-Sigma Modulator. IEEE Trans. Circuits and Systems-Part II, vol. 54, no. 8, pp. 725-729, Aug. 2007.
2. Z. Ye and M.P. Kennedy. Hardware Reduction in Digital Delta-Sigma Modulators via Error Masking-Part I: MASH DDSM, IEEE Trans. Circuits and Systems-Part I, vol.56, no.4, pp.714-726, April 2009