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Leader in Integrated ICT Hardware & Systems

PhD in PwrSoC POL - Point of Load Power Supply on Chip

PMcC14 - PhD in ‘PwrSoC POL - Point of Load Power Supply on Chip’

Contract Type: Full-time

Tyndall National Institute at University College, Cork wishes to appoint a candidate to a PhD Studentship in ‘PwrSoC POL - Point of Load Power Supply on Chip’

Tyndall, in conjunction with Microelectronic Circuits Centre ( MCCI), wishes to offer a PhD research position in the area of fully-integrated, non-isolated DC-DC ‘Point-of-Load’ (POL) converter design on CMOS.

The successful candidate will conduct highly innovative research in PwrSoC design, in support of Tyndall and MCCI’s strategic goal of being the world leader in Integrated Power System Design, employing Tyndall’s world-leading thin-film magnetics-on-silicon (TF MoS).  

The research will have very strong commercial relevance and there will be collaborative research opportunities with our industry partners.  

The research position is primarily based in Tyndall’s Integrated Magnetics Group but will be strongly supported by the co-located MCCI microelectronics design group (

High impact, tier-one research publications are expected.

Key Duties and Responsibilities

  • This PhD project will focus on the design and implementation of a highly integrated 12V-1V high-bandwidth point-of-load (POL) on CMOS, employing thin-film inductor technology and integrated capacitors. It is anticipated that the designed topology will be appropriate for efficient ‘voltage-breaking’ and therefore involve a rigorous assessment of the merits of multi-level, multi-stage, multi-phase, hybrid switched capacitor and resonant techniques. The final topology will primarily be appropriate for the relatively low value of inductances that are achievable with thin-film magnetic materials.
  • The CMOS process choice will depend on aspects such as switch technology choice (CMOS, LDMOS), benefits of SOI over junction isolation for high frequency switching, metal options, wafer-scale integration with thin-film inductors and suitability for integration of mixed signal controller designs. Current PMIC research activities in Tyndall/MCCI range 180nm SOI through to 28nm. The controller design will be mixed signal in nature and may leverage existing MCCI competencies in data converters spanning 10fF/step ADC and 32GS/s ADC. Generally the controller design will facilitate features such as low latency, architecture integration with real time control filters and energy-efficient ADC conversions.
  • The magnetic component will leverage Tyndall’s leadership in thin film magnetic materials and structures design. It is expected that the benefits of inductor-coupled phases will be exploited. Overall, the thin-film proposition has been significantly boosted in recent years by the advent of high performance materials which exhibit an order of magnitude reduction in hysteresis and anomalous loss at very high frequencies (10-100 MHz) over previous NiFe-based materials.
  • Capacitor integration and packaging technology analyses from the perspective of the impact of electrical parasitics will be a significant aspect of the research. Capacitors appropriate for ‘GHz’ decoupling in fast switching loops will be employed. Back-end-of-line (BEOL) wafer-scale capacitor technologies will be assessed. Chip ceramic, Deep-Trench silicon capacitors or Tyndall’s own atomic layer deposited (ALD) surface capacitors are all for consideration. Packaging will leverage Tyndall strengths in power-system-in-package (PwrSiP) and power-system-on-chip (PwrSoC).
  • Overall, the research will contribute significantly to our goal of creating world-leading technology for 12V to 1V DC-DC, appropriate for either the stand-alone POL converter, the multiple voltage PMIC or for use in the multi-phase microprocessor Voltage Regulator (VR). Very high switching frequency and controller bandwidth will also render the solutions very applicable to embedded power in emerging system-on-chip, SoC, granular power architectures, where high dynamic performance is required in chip architectures which have increasing voltage domain count.

Essential Criteria

  • The primary academic qualification is a first or upper second class honours degree (or equivalent international degree) in electronic engineering, physics or a related relevant discipline.
  • The successful candidate will be highly analytical and innovative across the broad range of disciplines related to CMOS integrated power control. The candidate will be driven towards creating high performance and highly integrated solutions with a high technology readiness level (high TRL).
  • There is a strong team-work aspect to this role, with a number of researchers, at varying levels, contributing to this particular strategic research strand. The challenge is very broad and as such there will be opportunity for a deeper focus in one of the component research areas, such as in thin-film magnetic component design or in the high performance mixed signal controller design on CMOS.
  • The ideal candidate will have completed the equivalent of a Master’s level research in PMIC design or power system design and will have a good publication record.

Informal enquiries can be made in confidence to Paul McCloskey, email

An annual student stipend of €18,000.00 applies for this successful candidate for this position.  Yearly University Academic Fees will be paid by the Institute.

Application Instructions

Step 1 - click here to download and the application form

Step 2 - return the completed application form, together with your cv and motivation letter to

Please note that Garda vetting and/or an international police clearance check may form part of the selection process.

Handwritten forms will not be accepted.  No late applications will be accepted.

The University, at its discretion, may undertake to make an additional appointment(s) from this competition following the conclusion of the process.

Tyndall National Institute at University College, Cork is an Equal Opportunities Employer.