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M.Eng.Sc. position in Assessing self-assembled monolayer quality

RD-05 M.Eng.Sc. position in Assessing self-assembled monolayer quality on germanium using electrical characterisation.

Contract: Full Time/Fixed Term

Job description

It is a well-established fact that silicon (Si) has had many good years as the main material in digital electronic technologies, but it is facing strong competition from other semiconductor materials that may one day replace it in the channel of the field-effect-transistor device. High carrier mobility materials, such as germanium (Ge), III-V compounds such as InGaAs, graphene, and transition metal dichalcogenides, are current candidate materials to replace Si channels. In simple terms higher electron and hole mobilities could lead to performance gain or power saving in digital applications

Many industrial chip makers and semiconductor tool vendors are interested in Ge as a potential replacement for Si as the semiconductor of choice for electronic devices. In order for this to be possible it is imperative that an oxide removal and surface passivation process be developed in the non-liquid phase. A criteria for successful passivation is that the Ge surface remain oxide free for up to 24 hours. This standard is necessary to account for system failure in a single step of the processing for transistors, whereby processing may be delayed for a period of 24 hours while the system failure is being repaired. Tyndall-UCC are investigating the potential of self-assembled monolayers (SAMs) of molecules on Ge to both act as a passivating agent to prevent re-oxidation of the Ge substrate and as a means to generate high quality dielectrics and electrical device contacts.

Key Challenges include

  • Preparation of substrates with different thicknesses of molecular layers (0.5 – 1.5 nm) so the impact on electrical properties can be assessed.
  • Determine how the SAM influences electronic properties in the gate stack.
  • Passivation of electrical interface states (trapped charge) by SAMs. i.e. Capacitance-Voltage Responses and Dit Extraction of the Gate Stacks.
  • Electrical unpinning of the surface by SAMs in the metal/n-type Ge system for parasitic resistance reduction. i.e. Self-Assembled-Monolayer impact on metal-semiconductor contact regions.

Key Responsibilities

  • The successful applicant will work primarily on material and electrical characterisation, acquiring important skills and working on cutting edge technology solutions.
  • Furthermore, the M.Eng.Sc. student will be encouraged to get a broad education. To that end he/she will be encouraged to be trained in a multitude of hands-on material analysis techniques, experience semiconductor processing first hand, perform electrical measurements in the test lab, and carry out modelling tasks.

The M.Eng.Sc. student will be trained in the multi-facetted art of research, and will be mentored through scientific writing, presenting to peers at technical conferences, and interacting with collaborators from other disciplines.

Finally, through the collaboration with an industrial project partner, the M.Eng.Sc student has the possibility of an industrial internship, as part of the project work, which will give him/her a valuable insight and experience into the world of industrial research and development.

Essential Criteria

  • The minimum academic qualification is a 1st or upper 2nd class honours degree (or an equivalent international degree) in physics, electronic engineering, or related discipline.

Any queries relating to this position can be forwarded to Ray Duffy on email

An annual student stipend of €18,500 applies for this successful candidate for this position. Yearly University Academic Fees will paid by the Tyndall National Institute.

Application Instructions

Step 1 – Click here to download the application form and indicate the Job Reference RD-05

Step 2 - Return the completed application form, together with your CV and motivation letter to

Postgraduate applicants whose first language is not English must provide evidence of English language proficiency as per UCC regulations ( Certificates should be valid (usually less than 2 years old) and should be uploaded with their application. In special circumstances the panel may consider a prior degree in English (e.g. Master thesis written in English) as evidence of English language proficiency.

Please note that Garda vetting and/or an international police clearance check may form part of the selection process.

The University, at its discretion, may undertake to make an additional appointment(s) from this competition following the conclusion of the process.

At this time, Tyndall National Institute does not require the assistance of recruitment agencies.

Tyndall National Institute at University College, Cork is an Equal Opportunities Employer.