As electronic chips are made smaller and faster, the wiring within the chips must also be thinner, finer and higher quality. Copper is the material that is used for wiring within chips ("interconnect"), because of its good conductivity and superior resistance to electromigration. Interconnect is built up from a series of layers.
A very thin (2 nm) continuous film of metallic Cu is needed as a seed layer for subsequent deposition of the interconnect itself. The ideal technique to deposit such a thin seed layer would be Atomic Layer Deposition (ALD).
Unfortunately, to date, all ALD-deposited Cu films of this thickness agglomerate into islands instead of forming a continuous thin layer.
Our research is directed towards understanding the ALD growth mechanism and finding new ALD chemistries that may avoid islanding.
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