Key Info
Duration: 2024-2028
Acronym: FAMES Pilot Line
PI Name: Giorgos Fagas, Cian O’Mathúna, Brian Corbett and Niamh Waldron.
Topic: Chips-CPL-2 Pilot line
Title: FD-SOI Pilot Line for Applications with Embedded Non-Volatile Memories, RF, 3D Integration and PMIC
Coordinator: CEA-Leti
Total Participants: 11
Project No: 101182297
EU Contribution: € 216 811 041,50
Project Information
The FAMES Pilot Line pioneering initiative promotes semiconductor technologies in Europe by supporting the emergence of higher-performance, more energy-efficient, and more sustainable chip designs.
The objectives of the FAMES Pilot Line are to establish a domestic semiconductor Pilot Line for cutting-edge microelectronic technologies in Europe, and provide open access to this Pilot Line to stakeholders of the electronic value chain. These objectives are aligned with those of the EU Chips Act: bolster the EU semiconductor industry and support European technological sovereignty through innovations, facilitated access to R&D, and training.
Partners
The FAMES Consortium brings together an outstanding group of partners : CEA-Leti, coordinator of the pilot line (France), imec (Belgium), Fraunhofer Mikroelektronik (Germany), Tyndall (Ireland), VTT (Finland), CEZAMAT WUT (Poland), UCLouvain (Belgium), Silicon Austria Labs (Austria), SiNANO Institute (France), Grenoble INP-UGA (France), and the University of Granada (Spain).
Responding to Sustainability Challenges
The development of FD-SOI at 10nm and 7nm nodes, combined with non-volatile memories (NVM) and 3D options, RF components and smart PMIC (power management for Integrated circuits) provides a pathway to deliver high-performance, low-power consumption solutions for future chips. These high-performance and low-power solutions will sustainably support the massive digitalization of our society by paving the way for new IC architectures, substantially reducing the overall circuit power consumption.
Semiconductor manufacturing, known for its technological precision, also generates a significant environmental footprint. The FAMES Pilot Line will drive eco-friendly practices by prioritizing resource optimization, advocating for a circular economy, and minimizing waste across the entire technological process, from chip design to manufacturing. Consequently, FAMES Pilot Line will significantly bolster the industry’s pursuit of achieving net-zero emissions by 2050.
FAMES technologies
The FAMES Pilot Line presents an unrivalled combination of forefront technologies, PDKs, demonstrators and process capabilities. The technologies developed in the FAMES Pilot Line will enable new chip architectures, and will allow new generations of microcontrollers, microprocessor units, chips for 5G/6G, smart imagers, smart sensors, processors for data fusion, wearable devices, trusted chips, quantum and cryoCMOS, edge AI chip and advanced packaging with chiplets, to name a few.
