Tyndall National Institute and CEA-Leti have announced a major milestone in advanced power delivery technologies with the tape-out of a Power Management Integrated Circuit (PMIC) in advanced FD-SOI technology. The PMIC will form the core of a 3D integrated DC-DC converter that combines embedded stripline inductors on a high-density capacitive interposer, designed to meet the power delivery demands of future artificial intelligence (AI), high-performance computing (HPC), and edge computing systems.
Delivered through the FAMES pilot line, with Tyndall as a partner and CEA-Leti as coordinator, this achievement marks an important step forward in the development of advanced semiconductor solutions for future computing systems.
The Challenge: Bringing Power Conversion Closer to the Point-of-Load (PoL) with High Efficiency
As semiconductor devices continue to require higher current levels at increasingly lower voltages, interleaved interconnect paths between voltage regulators and processors generate parasitic resistance and inductance, resulting in power losses, voltage droop, and degraded transient performance.
In this context, vertical power delivery has emerged as a key architectural requirement. Heterogeneous integration technologies provide a major enabling solution by bringing power conversion functions closer to the point-of-load.
To address these challenges, Tyndall and CEA-Leti are collaborating on a 3D integrated DC-DC converter designed to bring power conversion directly inside advanced semiconductor packages. By placing the power conversion stage in close proximity to the ASIC load, the approach significantly shortens current paths, reduces power distribution losses and enables substantially higher power density delivery.
The demonstrator combines three key technological building blocks:
- High-frequency integrated stripline inductors developed by Tyndall;
- A high-density capacitive silicon interposer developed by CEA-Leti;
- A 3-level two-phase hybrid DC-DC converter architecture designed by CEA-Leti and fabricated in a 22nm FD-SOI CMOS technology.
Together, these technologies form a compact heterogeneous power delivery platform designed for next-generation integrated systems. By integrating power conversion functions directly within the semiconductor package, the approach reduces power distribution losses, improves efficiency, and enables higher power density delivery in a significantly smaller footprint.
The converter is designed to deliver output currents of up to 2 A at a regulated output voltage of 0.8 V from a 1.8 V input supply, while occupying a PMIC area of just 2.5 mm². Testing has demonstrated efficiency exceeding 85% across an output power range of 600 mW to 1.5 W, with peak efficiency above 86.5%.
This milestone demonstrates the potential of ultra-compact power delivery systems enabled by two key FAMES technologies: high-performance integrated power inductors and high-density integrated capacitors. Together, these innovations open the door to a new generation of compact, energy-efficient power delivery solutions for advanced computing applications.
Commenting on this milestone, Dr Sambuddha Khan, FAMES Programme Manager, Tyndall, said:
This achievement underscores Tyndall’s research leadership and innovation strengths, while further enhancing our international positioning in advanced semiconductor technologies. It also highlights the value of collaborative research and innovation within the FAMES Pilot Line. We look forward to continuing our work with CEA-Leti and our partners to advance next-generation power delivery solutions.
Scientific Contributors:
- Tyndall National Institute: Rayan Bajwa, Yi Dou, Rajkumar Modak, Sambuddha Khan, Cian O’Mathuna
- CEA-Leti: Frederic Rothan, Aude Lefevre, Lilian Masarotto
